1/2/2024 0 Comments Cpu transistor count historyBut Apple has never confirmed that it will indeed use its high-performance smartphone cores for its PC SoCs, so their usage is speculation at this point. Meanwhile, the company purposely called these processors 'Apple silicon' rather than something like 'A-series for Macs.'Īt this point, it looks like Apple can scale its A14 Bionic design by adding CPU cores and GPU horsepower without risking making it too big. But even with all the 'upgrades,' its SoC for PCs will have a die size similar to that of Intel's higher-end versions of Ice Lake-U CPUs that are smaller than Intel's latest Tiger Lake-U processors.Īpple has not revealed many details about its SoCs for PCs except saying that they will use the same common architecture that is used across all of its devices. Of course, it will have to improve its memory subsystem (which might involve an additional 64-bit memory channel and enlarged system cache). Judging from dimensions of Apple's FireStorm complex and the new GPU, the company can double the number of high-performance cores and GPU clusters without significantly increasing the die size of the A14 Bionic. While it is only a speculation at this point, we can expect the company to use a similar tactic when developing its SoCs for notebooks and desktops. When it needed a better-performing SoC for its iPad Air and iPad Pro tablets, it usually added CPU cores, a better GPU, more in-package memory with a wider interface, and a heat spreader for better dissipation. Speculations: Can the A14 Bionic Give an Idea About Apple's SoCs for Macs?Īpple has been developing its SoCs for smartphones, tablets, smartwatches, and more recently for wearables and hearables for more than a decade now. To some degree, this test can be considered as a drag race for modern computers. Still, it gives an idea about maximum theoretical performance an SoC can achieve. Performance numbers in Speedometer 2.0 cannot give any information about performance in complex applications that are optimized for modern x86 CPUs. This growth in transistor count became known as Moore’s law, named after company cofounder Gordon Moore, who observed in 1965 that the transistor count on a silicon chip would double approximately annually he revised it in 1975 to a doubling every two years. Indeed, A14's early performance numbers obtained in Speedometer 2.0, a browser benchmark that measures the responsiveness of Web applications by simulating rather primitive user actions, indicate that the SoC can be up to 54% faster than Intel's eight-core Core i9, which powers Apple's MacBook Pro from late 2019. The Itanium 9500, which was released in 2012, had 3,100,000,000 transistors. In fact, given Apple's focus on ultimate performance, its SoCs usually feature big caches (to some degree, this can be confirmed by the die shot provided by SemiAnalysys/ ICmasters) and probably other performance optimizations. These parts can sacrifice density for performance by using high-performance cells that are usually larger. Given that all modern SoCs contain different types of processor cores, they also use loads of caches.Īlso, parts of the chip have to operate at higher clocks (e.g., general-purpose cores). SRAM needs interconnects and circuitry to access it, and such interconnects do not always scale well. Designs of modern processors are extremely SRAM-intensive because SRAM is used for registers as well as caches.
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